The session defines the Mirroring Property in Complementary Static Logic (CSL), where a Boolean function $F$ satisfies this property if its complement under input inversion ($\bar{F}$) maps minterms of $F(A, B)$ directly to minterms of $\bar{F}(\bar{A}, \bar{B})$. When satisfied, this theorem permits the synthesis of symmetric CMOS circuits by replicating a Pull-Down Network structure in the Pull-Up Network while complementing input literals. Additionally, Pseudo-NMOS theory establishes that sizing ratios ($W_N/W_P$) must be calculated based on worst-case voltage drop conditions at saturation to ensure valid logic levels despite inherent static leakage paths caused by active load devices.
The session defines the Mirroring Property in Complementary Static Logic (CSL), where a Boolean function $F$ satisfies this property if its complement under input inversion ($\bar{F}$) maps minterms …