Conceptual

Hardware Pseudo-Random Number Generator with Programmable Output Statistics

A CMOS hardware pseudo-random number generator that emits multiple uncorrelated bit sequences whose statistical distribution can be tuned on the fly. Students learn how a linear feedback shift register yields uniform m-bit samples, how XOR taps with distinct intervals produce uncorrelated sequences, how comparing the sample against a programmable threshold sets the probability of a 1, and how sharing one LFSR and threshold controller across parallel comparators delivers many sequences at very low area and energy, enabling dynamic annealing schedules for optimization hardware such as Ising machines.