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TReCiM: Temperature-Resilient Multibit 2FeFET-1T Compute-in-Memory Design

A temperature-resilient, multibit 2FeFET-1T compute-in-memory cell that adds a MOSFET clamp exploiting the transistor's complementary-to-absolute-temperature (CTAT) characteristic to cancel subthreshold-FeFET temperature drift from 0 to 85 C while using FeFET multi-level-cell states for multibit multiply-accumulate at array scale.

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TReCiM: Lower Power and Temperature-Resilient Multibit 2FeFET-1T Compute-in-Memory Design Yifei

This computer-engineering conference paper (ICCAD) presents TReCiM, a compute-in-memory (CiM) cell and array design for energy-efficient neural-network acceleration. CiM performs multiply-accumulate …