About Week-1 NPTEL-Digital IC Design-Live session-1(Jan.2024) TA Arpit Bal

Two’s Complement Arithmetic, Overflow Detection, and Multiplier Delay Analysis CMOS Inverter Trip Point Calculation for Short and Long Channel Transistors Mirroring Property and Pseudo-NMOS Inverter Sizing in CMOS Logic Synthesis Short Channel Effects: DIBL and Leakage Current Physics Dynamic Power and Propagation Delay in CMOS Inverter Characteristic Curves Critical Path Delay Analysis for Carry Skip, Carry Select, and Ripple Carry Adders Flip-Flop Timing Constraints and Time Borrowing in Digital Sequential Circuits Elmore Delay Calculation and Gate Sizing for CMOS Logic Logical Effort and Parasitic Delay Calculation for Multi-Stage Logic Chains Noise Margin and Elmore Delay Calculation in CMOS Inverters NGSPICE Transient Analysis and Inverter Characterization